A 64Kbit CMOS non-volatile serial EEPROM called the 24C64 is set up as 8K x 8 bit memory. The Extended IIC2-wire protocol, which this device confirms to, permits access to memory larger than 16K bits on an IIC bus. This serial communication protocol synchronizes data between a master (such as a microcontroller) and a slave using a Clock signal (SCL) and a Data signal (SDA) (EEPROM). The 24C64 is made to reduce pin count and ease PC board layout requirements. 24C64 offers hardware write protection where by entire memory array can be write protected by connecting WP pin to VCC This section of memory then becomes unalterable until the WP pin is switched to VSS.
Features
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Its extended operating voltage is 2.2V to 5.5V
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Its clock frequency up to 400KHz at the 2.2 to 5.5V
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It has schmit trigger input
- It has 32 byte page write mode
- It has self timed write cycle
- It has hardware write protection for the entire away
Specification
| Model | L66424C64API27 |
| Type | EEPROM IC |
| Package | 8 Pin DIP |
| No of pin | 8 |
| Input rise and fall time | 10nS |
| SDA and SCL rise time | 0.3 Microsecond |
| SDA and SCL fall time | 300nS |
| Write cycle time | 6nS |
| Country of Origin | China |
